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AMI Semiconductor
1.50 Micron

ABN Process

MOSIS is phasing out support for MPW (MultiProject Wafer) runs in the ABN process in response to AMI's (now ON Semi) moving ABN into end-of-life.

The date of the last ABN MPW will be February 23, 2009.

Dedicated run users should contact MOSIS Support.



1. Process Description

This n-well CMOS process has 2 metal layers, 2 poly layers, and an NPN option. PiP (poly2 over poly) capacitors (600 aF/µm²) are available. MOSIS orders epi wafers for this process.

For more information, see the AMIS Mixed-Signal Foundry Services web page.

2. Design Rules

This process support the following design rules

Design Rules Lambda
(micro- meter)
Feature Size
(micro- meter)
Available
From
AMIS_ABN n/a 1.50 AMIS (See Section 3)

SCMOS 0.80 1.50
(after sizing)
MOSIS in HTML


In order to achieve consistent and uniform electrical behavior for both analog and digital designs, MOSIS recommends a design lambda of 0.8 µm for the AMIS ABN process. The minimum drawn MOS transistor channel length and contact diameter will then be 1.6 µm.

MOSIS also recommends, where uniform device characteristics are important, that the minimum channel width (ACTIVE) be 5 lambda instead of 3 lambda as stated in the "MOSIS Scalable Design Rules 2.1." The ABN process will continue to support use of the SCMOS tight metal rules at lambda of 0.8 µm.

MOSIS Technology Codes

See Technology Codes for AMIS ABN Process.

Important note about pads

The bonding pads on designs submitted to these runs should have metal1 (and via) under the metal2. If these guidelines are not followed, metal lifting problems can occur.

3. AMIS Design Rules, Process Specifications, and SPICE Parameters

AMIS has sub-licensed MOSIS to distribute this information to customers who do not have a MyAMIS account. To obtain any of these items you must have an account with MOSIS, submit the on-line AMIS Access Request, then sign both the Confidentiality Agreement (CDA) and Design Kit License Agreement (DKLA).

4. Parametric Test Results and SPICE Model Parameters

See Test Results for AMIS ABN runs.

5. Reticle/Wafer Size, Steps, Turnaround Time, Wafer and Die Thickness



AMIS ABN Process
Wafer Size
(inches)
Reticle Size (mili- meters, approx.) Reticle Copies Stepped on Wafer (approx.) Turn- around Time (weeks, approx.) Die Thickness
(+/- .5 mil)
Wafer Thickness
Mils Micro- meters Mils Micro- meters
5 Ultratech 1X,
3 fields,
each 27 x 10
Field 1: 7
Field 2: 9
Field 3: 5
8 - 10 10 250 26 660



Related Links
  • MOSIS-Supported AMIS Processes
  • AMIS Technology Codes & Layer Maps
  • AMIS Document Access



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