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Welcome to MOSIS
From prototype to production, MOSIS is a design engineer's single
source for a wide variety of semiconductor processes offered by major
foundries.
Costs are kept low by combining designs from many customers into
multi-project wafer (MPW) runs. With prototype costs reduced,
engineers can submit several variations of the same design to the same
run, thus
shortening time-to-market.
Final designs can then be submitted to MOSIS for low- medium volume
production or dedicated Engineering wafer runs (COT).
Along with wafers and die, MOSIS provides a full range of packaging
and bonding options for designs fabricated through our service.
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Fabrication Schedule
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AUG 23
TSMC 0.13 µm
TSMC 65 nm
AUG 30
AMS C35B4M3
AMS S35D4
ON-SEMI I2T100
ON-SEMI I2T30
TSMC 0.18 µm
TSMC 0.25 µm
TSMC 90 nm
SEP 07
IBM 7WL
PEREGRINE FC
TSMC 0.18 µm
TSMC 65 nm
SEP 09
IBM 7HV
SEP 13
IBM 32SOI
IBM 8HP
ON-SEMI I3T25
SEP 20
IBM 8WL
PEREGRINE GC
TSMC 0.18 µm
TSMC 0.25 µm
TSMC 40 nm
TSMC 45 nm
SEP 27
IBM 9LP
ON-SEMI C5F/C5N
TSMC 0.13 µm
TSMC 65 nm
OCT 04
IBM 6WL
ON-SEMI I3T80
PEREGRINE FA
PEREGRINE GA
TSMC 0.18 µm
TSMC 0.25 µm
TSMC 90 nm
More...
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