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MOSIS Supported Options
IBM 9LP/9RF CMOS Process

Unless stated otherwise, all options listed below are available on MPW runs without additional cost. Other configurations are available for dedicated runs, or on MPW runs by prior arrangement. Please contact MOSIS support for additional details, e.g. costs.

Feature Group Option Descriptions Additional
Masks
  Part
  Number
Base Features for CMOS 9LP Always included   40N1869

Well N-well and p-well in substrate and an isolated p-well BF, N3 93P2028

Oxide Thin + thick oxide DG 93P2055

Zero-Vt Thin-oxide zero-Vt NFET DE 41K8368

Thick-oxide zero-Vt NFET DE, DG 41K8370

FET Regular-Vt + low-Vt + high-Vt + super high-Vt + 1.8 V and/or 2.5 V I/O NFET XW, NR, HN, DG, JN, DE 41K8308

Regular-Vt + low-Vt + high-Vt + super high-Vt + 1.8 V and/or 2.5 V I/O PFET LW, PR, HP, DG, JP, DF 41K8312

Resistor P+ polysilicon OP resistor OP 06K7940

N+ diffusion OP resistor OP 41K9348

N-well resistor   17R4145

Precision RP resistor OP, RP 41C10102

Capacitor Thin-oxide NFET in n-well capacitor (NCAP)   41K8371

Thin-oxide PFET in p-well capacitor (PCAP) PCAP, N3 41C10092

Thick-oxide NCAP DG 41K8372

Vertical natural capacitor (VNCAP)   27R6144

Miscellaneous Electrostatic discharge (ESD) devices OP 27R3217

Vertical PNP bipolar transistor OP 17R4146

SRAM SRAM cell SH 41K9347

Fuse Electrically programmable fuse (eFUSE)   57P6150

Bonding Aluminum wire bond VV, (LB, LD), DV 01L6995

Plated C4 (flip-chip) VV, (LB, LD), LV, TM 01L69931

Final Protection Wirebond only DV 29L5231

C4 only LV 01L69981

Metalization: Digital Stack Two 2x copper levels in a TEOS/FTEOS dielectric with LB WT, BA, WA, BB, VV 17R4149

Six Cu metal levels plus LB   29L6986

Nitride MiM capacitor HT, QT 41K93792

Metalization: Analog Stack2 One 2x copper level in TEOS/FTEOS with 12x thick copper and LD WT, BA, JT, OL, VV, LD 44K22012

Six Cu metal levels, including LD   29L69862

BEOL inductor with LD, OL IND 44K30852

Single High-K MiM capacitor HK, QK 44K58752

Available but not qualified3 BEOL inductor with LB topmetal (digital stack)   70P6164

Junction Field Effect Transistor (JFET) JC, N3 48J8205

Thin-oxide high-gain NFET KN 27R6145

Thin-oxide high-gain PFET KP 27R6146

3.3 V I/O NFET DG, JN, XE 44K7056

3.3 V I/O PFET DG, JP, DF 44K7057

Hyper-abrupt varactor JD 57P5776

Silicided poly resistor SILPCRES 44K5768

TaN BEOL Resistor K5 44K5766

Metal Stacks 4
9-Metal Digital Metal Stack
9LB_6_02_00_00
 


LB
  r-arrow   Bond metal
VV
 
   

M2_2B  
   
V1_2B
 
  r-arrow   2x thick metals

M1_2B  
   
V0_2B
 
   

M6
   
V5
 
   

M5
   
V4
 
   

M4
   
V3
 
   

M3
  r-arrow   1x thin metals
V2
 
   

M2
   
V1
 
   

M1
   
CA
 
   
8-Metal Analog Metal Stack
8LD_5_01_00_01
 


LD
  r-arrow   Bond metal
VV
 
   

OL
  r-arrow   12x metal
JT
 
   

M1_2B  
  r-arrow   2x thick metal
V0_2B
 
   

M5
   
V4
 
   

M4
   
V3
 
   

M3
  r-arrow   1x thin metals
V2
 
   

M2
   
V1
 
   

M1
   
CA
 
   



1 Subject to availability at additional cost. Advance notice required by contacting MOSIS via the MOSIS Support System posted to http://support.mosis.com/

2 This device can only be fabricated at one of IBM's foundries. All other devices can be fabricated at any one of the Common Platform (CP) foundries. The CP is a collaboration between IBM and several other foundries to provide advanced feature size fabrication. Irrespective of which foundry is used, the designer can be assured that their parts will behave as if they were fabricated at IBM.

3 These options may not yet be qualified for reliability, or models are not correlated to hardware at this time. Please check the current manual for status.

4 Other configurations subject to availability with sufficient notice to support@mosis.com.





Related Links
  • IBM 9LP/9RF Process
  • IBM Technology Codes
  • MOSIS-Supported IBM Processes





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